The present disclosure relates to an analog-to-digital converter (“ADC”). More specifically, the disclosure relates to an ADC using a suppressed carrier pulse width modulated (“PWM”) or other feedback signal.
Analog-to-digital conversion is a process of converting continuous or analog signals into discrete digital signals without losing the essential content of the original signal. One example of an ADC is a sigma delta ADC, which may be used in handheld radio transceivers such as cell phones. Sigma delta ADCs allow for a high resolution conversion, however, they may suffer from various drawbacks. For example, although sigma delta ADCs allow for high resolutions, they may be slow because of the need to oversample the input signal. The oversampling ratio directly impacts the resolution of a sigma delta ADC. Further, the dynamic range of a continuous time sigma delta ADC may be limited for a given power supply voltage and power consumption budget. In a sigma delta ADC, the feedback signal may have high power at high frequencies and the performance of the ADC may be limited based on the need to accommodate this power. This may be true even with small input signals into the ADC input.
In addition, continuous time sigma delta ADCs may require a high sampling frequency, which results in increased power dissipation. Likewise, continuous time noise shaping ADCs may be limited by aperture error or sampling clock jitter. The sampling clock jitter results in uncertainty in the actual sampling time. The error may be relatively small at low frequencies, but may be significant at higher frequencies. The jitter also affects the quality of the feedback signal in a noise shaping loop and may cause disagreement between the feedback signal and the corresponding digital output of the ADC resulting in distortion or degradation of the signal-to-noise ratio.
Further, quantization noise may result from the process of reducing the continuous analog signal to a discrete digital signal. The sampling that occurs in reducing the analog signal to the digital signal inherently is not an exact replication of the original signal, and the difference between the signals is the quantization error. Each sample of the digital signal is an estimate of the analog signal at a certain point in time, and the difference between the signals is the quantization noise. The quantization error is caused by the finite resolution of the ADC. There may be additional noise that is produced by the ADC, but the quantization noise may be and is often the biggest component.
Accordingly, it is desirable to produce ADCs with increased dynamic range that minimize the distortion of the signal and the quantization noise during the conversion. Increased dynamic range of a continuous-time sigma delta ADC may allow for increased performance and decreased costs for a given power supply voltage and power consumption budget.